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471 lines
16 KiB
471 lines
16 KiB
/***************************************************************************** |
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* Copyright (c) 2019, Nations Technologies Inc. |
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* |
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* All rights reserved. |
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* **************************************************************************** |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* - Redistributions of source code must retain the above copyright notice, |
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* this list of conditions and the disclaimer below. |
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* |
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* Nations' name may not be used to endorse or promote products derived from |
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* this software without specific prior written permission. |
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* |
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY NATIONS "AS IS" AND ANY EXPRESS OR |
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
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* DISCLAIMED. IN NO EVENT SHALL NATIONS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, |
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, |
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* ****************************************************************************/ |
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/** |
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* @file n32g45x_spi.h |
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* @author Nations |
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* @version v1.0.0 |
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* |
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* @copyright Copyright (c) 2019, Nations Technologies Inc. All rights reserved. |
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*/ |
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#ifndef __N32G45X_SPI_H__ |
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#define __N32G45X_SPI_H__ |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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#include "n32g45x.h" |
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/** @addtogroup N32G45X_StdPeriph_Driver |
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* @{ |
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*/ |
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/** @addtogroup SPI |
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* @{ |
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*/ |
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/** @addtogroup SPI_Exported_Types |
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* @{ |
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*/ |
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/** |
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* @brief SPI Init structure definition |
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*/ |
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typedef struct |
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{ |
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uint16_t DataDirection; /*!< Specifies the SPI unidirectional or bidirectional data mode. |
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This parameter can be a value of @ref SPI_data_direction */ |
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uint16_t SpiMode; /*!< Specifies the SPI operating mode. |
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This parameter can be a value of @ref SPI_mode */ |
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uint16_t DataLen; /*!< Specifies the SPI data size. |
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This parameter can be a value of @ref SPI_data_size */ |
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uint16_t CLKPOL; /*!< Specifies the serial clock steady state. |
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This parameter can be a value of @ref SPI_Clock_Polarity */ |
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uint16_t CLKPHA; /*!< Specifies the clock active edge for the bit capture. |
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This parameter can be a value of @ref SPI_Clock_Phase */ |
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uint16_t NSS; /*!< Specifies whether the NSS signal is managed by |
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hardware (NSS pin) or by software using the SSI bit. |
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This parameter can be a value of @ref SPI_Slave_Select_management */ |
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uint16_t BaudRatePres; /*!< Specifies the Baud Rate prescaler value which will be |
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used to configure the transmit and receive SCK clock. |
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This parameter can be a value of @ref SPI_BaudRate_Prescaler. |
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@note The communication clock is derived from the master |
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clock. The slave clock does not need to be set. */ |
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uint16_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. |
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This parameter can be a value of @ref SPI_MSB_LSB_transmission */ |
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uint16_t CRCPoly; /*!< Specifies the polynomial used for the CRC calculation. */ |
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} SPI_InitType; |
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/** |
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* @brief I2S Init structure definition |
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*/ |
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typedef struct |
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{ |
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uint16_t I2sMode; /*!< Specifies the I2S operating mode. |
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This parameter can be a value of @ref I2sMode */ |
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uint16_t Standard; /*!< Specifies the standard used for the I2S communication. |
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This parameter can be a value of @ref Standard */ |
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uint16_t DataFormat; /*!< Specifies the data format for the I2S communication. |
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This parameter can be a value of @ref I2S_Data_Format */ |
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uint16_t MCLKEnable; /*!< Specifies whether the I2S MCLK output is enabled or not. |
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This parameter can be a value of @ref I2S_MCLK_Output */ |
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uint32_t AudioFrequency; /*!< Specifies the frequency selected for the I2S communication. |
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This parameter can be a value of @ref I2S_Audio_Frequency */ |
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uint16_t CLKPOL; /*!< Specifies the idle state of the I2S clock. |
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This parameter can be a value of @ref I2S_Clock_Polarity */ |
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} I2S_InitType; |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_Exported_Constants |
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* @{ |
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*/ |
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#define IS_SPI_PERIPH(PERIPH) (((PERIPH) == SPI1) || ((PERIPH) == SPI2) || ((PERIPH) == SPI3)) |
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#define IS_SPI_2OR3_PERIPH(PERIPH) (((PERIPH) == SPI2) || ((PERIPH) == SPI3)) |
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/** @addtogroup SPI_data_direction |
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* @{ |
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*/ |
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#define SPI_DIR_DOUBLELINE_FULLDUPLEX ((uint16_t)0x0000) |
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#define SPI_DIR_DOUBLELINE_RONLY ((uint16_t)0x0400) |
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#define SPI_DIR_SINGLELINE_RX ((uint16_t)0x8000) |
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#define SPI_DIR_SINGLELINE_TX ((uint16_t)0xC000) |
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#define IS_SPI_DIR_MODE(MODE) \ |
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(((MODE) == SPI_DIR_DOUBLELINE_FULLDUPLEX) || ((MODE) == SPI_DIR_DOUBLELINE_RONLY) \ |
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|| ((MODE) == SPI_DIR_SINGLELINE_RX) || ((MODE) == SPI_DIR_SINGLELINE_TX)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_mode |
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* @{ |
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*/ |
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#define SPI_MODE_MASTER ((uint16_t)0x0104) |
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#define SPI_MODE_SLAVE ((uint16_t)0x0000) |
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#define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_MASTER) || ((MODE) == SPI_MODE_SLAVE)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_data_size |
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* @{ |
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*/ |
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#define SPI_DATA_SIZE_16BITS ((uint16_t)0x0800) |
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#define SPI_DATA_SIZE_8BITS ((uint16_t)0x0000) |
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#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATA_SIZE_16BITS) || ((DATASIZE) == SPI_DATA_SIZE_8BITS)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_Clock_Polarity |
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* @{ |
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*/ |
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#define SPI_CLKPOL_LOW ((uint16_t)0x0000) |
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#define SPI_CLKPOL_HIGH ((uint16_t)0x0002) |
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#define IS_SPI_CLKPOL(CPOL) (((CPOL) == SPI_CLKPOL_LOW) || ((CPOL) == SPI_CLKPOL_HIGH)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_Clock_Phase |
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* @{ |
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*/ |
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#define SPI_CLKPHA_FIRST_EDGE ((uint16_t)0x0000) |
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#define SPI_CLKPHA_SECOND_EDGE ((uint16_t)0x0001) |
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#define IS_SPI_CLKPHA(CPHA) (((CPHA) == SPI_CLKPHA_FIRST_EDGE) || ((CPHA) == SPI_CLKPHA_SECOND_EDGE)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_Slave_Select_management |
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* @{ |
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*/ |
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#define SPI_NSS_SOFT ((uint16_t)0x0200) |
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#define SPI_NSS_HARD ((uint16_t)0x0000) |
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#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || ((NSS) == SPI_NSS_HARD)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_BaudRate_Prescaler |
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* @{ |
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*/ |
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#define SPI_BR_PRESCALER_2 ((uint16_t)0x0000) |
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#define SPI_BR_PRESCALER_4 ((uint16_t)0x0008) |
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#define SPI_BR_PRESCALER_8 ((uint16_t)0x0010) |
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#define SPI_BR_PRESCALER_16 ((uint16_t)0x0018) |
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#define SPI_BR_PRESCALER_32 ((uint16_t)0x0020) |
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#define SPI_BR_PRESCALER_64 ((uint16_t)0x0028) |
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#define SPI_BR_PRESCALER_128 ((uint16_t)0x0030) |
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#define SPI_BR_PRESCALER_256 ((uint16_t)0x0038) |
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#define IS_SPI_BR_PRESCALER(PRESCALER) \ |
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(((PRESCALER) == SPI_BR_PRESCALER_2) || ((PRESCALER) == SPI_BR_PRESCALER_4) || ((PRESCALER) == SPI_BR_PRESCALER_8) \ |
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|| ((PRESCALER) == SPI_BR_PRESCALER_16) || ((PRESCALER) == SPI_BR_PRESCALER_32) \ |
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|| ((PRESCALER) == SPI_BR_PRESCALER_64) || ((PRESCALER) == SPI_BR_PRESCALER_128) \ |
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|| ((PRESCALER) == SPI_BR_PRESCALER_256)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_MSB_LSB_transmission |
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* @{ |
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*/ |
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#define SPI_FB_MSB ((uint16_t)0x0000) |
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#define SPI_FB_LSB ((uint16_t)0x0080) |
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#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FB_MSB) || ((BIT) == SPI_FB_LSB)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup I2sMode |
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* @{ |
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*/ |
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#define I2S_MODE_SlAVE_TX ((uint16_t)0x0000) |
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#define I2S_MODE_SlAVE_RX ((uint16_t)0x0100) |
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#define I2S_MODE_MASTER_TX ((uint16_t)0x0200) |
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#define I2S_MODE_MASTER_RX ((uint16_t)0x0300) |
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#define IS_I2S_MODE(MODE) \ |
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(((MODE) == I2S_MODE_SlAVE_TX) || ((MODE) == I2S_MODE_SlAVE_RX) || ((MODE) == I2S_MODE_MASTER_TX) \ |
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|| ((MODE) == I2S_MODE_MASTER_RX)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup Standard |
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* @{ |
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*/ |
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#define I2S_STD_PHILLIPS ((uint16_t)0x0000) |
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#define I2S_STD_MSB_ALIGN ((uint16_t)0x0010) |
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#define I2S_STD_LSB_ALIGN ((uint16_t)0x0020) |
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#define I2S_STD_PCM_SHORTFRAME ((uint16_t)0x0030) |
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#define I2S_STD_PCM_LONGFRAME ((uint16_t)0x00B0) |
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#define IS_I2S_STANDARD(STANDARD) \ |
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(((STANDARD) == I2S_STD_PHILLIPS) || ((STANDARD) == I2S_STD_MSB_ALIGN) || ((STANDARD) == I2S_STD_LSB_ALIGN) \ |
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|| ((STANDARD) == I2S_STD_PCM_SHORTFRAME) || ((STANDARD) == I2S_STD_PCM_LONGFRAME)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup I2S_Data_Format |
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* @{ |
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*/ |
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#define I2S_DATA_FMT_16BITS ((uint16_t)0x0000) |
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#define I2S_DATA_FMT_16BITS_EXTENDED ((uint16_t)0x0001) |
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#define I2S_DATA_FMT_24BITS ((uint16_t)0x0003) |
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#define I2S_DATA_FMT_32BITS ((uint16_t)0x0005) |
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#define IS_I2S_DATA_FMT(FORMAT) \ |
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(((FORMAT) == I2S_DATA_FMT_16BITS) || ((FORMAT) == I2S_DATA_FMT_16BITS_EXTENDED) \ |
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|| ((FORMAT) == I2S_DATA_FMT_24BITS) || ((FORMAT) == I2S_DATA_FMT_32BITS)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup I2S_MCLK_Output |
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* @{ |
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*/ |
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#define I2S_MCLK_ENABLE ((uint16_t)0x0200) |
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#define I2S_MCLK_DISABLE ((uint16_t)0x0000) |
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#define IS_I2S_MCLK_ENABLE(OUTPUT) (((OUTPUT) == I2S_MCLK_ENABLE) || ((OUTPUT) == I2S_MCLK_DISABLE)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup I2S_Audio_Frequency |
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* @{ |
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*/ |
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#define I2S_AUDIO_FREQ_192K ((uint32_t)192000) |
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#define I2S_AUDIO_FREQ_96K ((uint32_t)96000) |
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#define I2S_AUDIO_FREQ_48K ((uint32_t)48000) |
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#define I2S_AUDIO_FREQ_44K ((uint32_t)44100) |
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#define I2S_AUDIO_FREQ_32K ((uint32_t)32000) |
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#define I2S_AUDIO_FREQ_22K ((uint32_t)22050) |
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#define I2S_AUDIO_FREQ_16K ((uint32_t)16000) |
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#define I2S_AUDIO_FREQ_11K ((uint32_t)11025) |
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#define I2S_AUDIO_FREQ_8K ((uint32_t)8000) |
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#define I2S_AUDIO_FREQ_DEFAULT ((uint32_t)2) |
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#define IS_I2S_AUDIO_FREQ(FREQ) \ |
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((((FREQ) >= I2S_AUDIO_FREQ_8K) && ((FREQ) <= I2S_AUDIO_FREQ_192K)) || ((FREQ) == I2S_AUDIO_FREQ_DEFAULT)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup I2S_Clock_Polarity |
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* @{ |
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*/ |
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#define I2S_CLKPOL_LOW ((uint16_t)0x0000) |
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#define I2S_CLKPOL_HIGH ((uint16_t)0x0008) |
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#define IS_I2S_CLKPOL(CPOL) (((CPOL) == I2S_CLKPOL_LOW) || ((CPOL) == I2S_CLKPOL_HIGH)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_I2S_DMA_transfer_requests |
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* @{ |
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*/ |
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#define SPI_I2S_DMA_TX ((uint16_t)0x0002) |
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#define SPI_I2S_DMA_RX ((uint16_t)0x0001) |
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#define IS_SPI_I2S_DMA(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_NSS_internal_software_management |
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* @{ |
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*/ |
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#define SPI_NSS_HIGH ((uint16_t)0x0100) |
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#define SPI_NSS_LOW ((uint16_t)0xFEFF) |
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#define IS_SPI_NSS_LEVEL(INTERNAL) (((INTERNAL) == SPI_NSS_HIGH) || ((INTERNAL) == SPI_NSS_LOW)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_CRC_Transmit_Receive |
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* @{ |
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*/ |
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#define SPI_CRC_TX ((uint8_t)0x00) |
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#define SPI_CRC_RX ((uint8_t)0x01) |
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#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_TX) || ((CRC) == SPI_CRC_RX)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_direction_transmit_receive |
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* @{ |
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*/ |
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#define SPI_BIDIRECTION_RX ((uint16_t)0xBFFF) |
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#define SPI_BIDIRECTION_TX ((uint16_t)0x4000) |
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#define IS_SPI_BIDIRECTION(DIRECTION) (((DIRECTION) == SPI_BIDIRECTION_RX) || ((DIRECTION) == SPI_BIDIRECTION_TX)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_I2S_interrupts_definition |
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* @{ |
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*/ |
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#define SPI_I2S_INT_TE ((uint8_t)0x71) |
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#define SPI_I2S_INT_RNE ((uint8_t)0x60) |
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#define SPI_I2S_INT_ERR ((uint8_t)0x50) |
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#define IS_SPI_I2S_CONFIG_INT(IT) (((IT) == SPI_I2S_INT_TE) || ((IT) == SPI_I2S_INT_RNE) || ((IT) == SPI_I2S_INT_ERR)) |
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#define SPI_I2S_INT_OVER ((uint8_t)0x56) |
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#define SPI_INT_MODERR ((uint8_t)0x55) |
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#define SPI_INT_CRCERR ((uint8_t)0x54) |
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#define I2S_INT_UNDER ((uint8_t)0x53) |
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#define IS_SPI_I2S_CLR_INT(IT) (((IT) == SPI_INT_CRCERR)) |
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#define IS_SPI_I2S_GET_INT(IT) \ |
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(((IT) == SPI_I2S_INT_RNE) || ((IT) == SPI_I2S_INT_TE) || ((IT) == I2S_INT_UNDER) || ((IT) == SPI_INT_CRCERR) \ |
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|| ((IT) == SPI_INT_MODERR) || ((IT) == SPI_I2S_INT_OVER)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_I2S_flags_definition |
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* @{ |
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*/ |
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#define SPI_I2S_RNE_FLAG ((uint16_t)0x0001) |
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#define SPI_I2S_TE_FLAG ((uint16_t)0x0002) |
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#define I2S_CHSIDE_FLAG ((uint16_t)0x0004) |
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#define I2S_UNDER_FLAG ((uint16_t)0x0008) |
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#define SPI_CRCERR_FLAG ((uint16_t)0x0010) |
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#define SPI_MODERR_FLAG ((uint16_t)0x0020) |
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#define SPI_I2S_OVER_FLAG ((uint16_t)0x0040) |
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#define SPI_I2S_BUSY_FLAG ((uint16_t)0x0080) |
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#define IS_SPI_I2S_CLR_FLAG(FLAG) (((FLAG) == SPI_CRCERR_FLAG)) |
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#define IS_SPI_I2S_GET_FLAG(FLAG) \ |
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(((FLAG) == SPI_I2S_BUSY_FLAG) || ((FLAG) == SPI_I2S_OVER_FLAG) || ((FLAG) == SPI_MODERR_FLAG) \ |
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|| ((FLAG) == SPI_CRCERR_FLAG) || ((FLAG) == I2S_UNDER_FLAG) || ((FLAG) == I2S_CHSIDE_FLAG) \ |
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|| ((FLAG) == SPI_I2S_TE_FLAG) || ((FLAG) == SPI_I2S_RNE_FLAG)) |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_CRC_polynomial |
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* @{ |
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*/ |
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#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1) |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_Exported_Macros |
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* @{ |
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*/ |
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/** |
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* @} |
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*/ |
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/** @addtogroup SPI_Exported_Functions |
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* @{ |
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*/ |
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void SPI_I2S_DeInit(SPI_Module* SPIx); |
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void SPI_Init(SPI_Module* SPIx, SPI_InitType* SPI_InitStruct); |
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void I2S_Init(SPI_Module* SPIx, I2S_InitType* I2S_InitStruct); |
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void SPI_InitStruct(SPI_InitType* SPI_InitStruct); |
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void I2S_InitStruct(I2S_InitType* I2S_InitStruct); |
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void SPI_Enable(SPI_Module* SPIx, FunctionalState Cmd); |
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void I2S_Enable(SPI_Module* SPIx, FunctionalState Cmd); |
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void SPI_I2S_EnableInt(SPI_Module* SPIx, uint8_t SPI_I2S_IT, FunctionalState Cmd); |
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void SPI_I2S_EnableDma(SPI_Module* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState Cmd); |
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void SPI_I2S_TransmitData(SPI_Module* SPIx, uint16_t Data); |
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uint16_t SPI_I2S_ReceiveData(SPI_Module* SPIx); |
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void SPI_SetNssLevel(SPI_Module* SPIx, uint16_t SPI_NSSInternalSoft); |
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void SPI_SSOutputEnable(SPI_Module* SPIx, FunctionalState Cmd); |
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void SPI_ConfigDataLen(SPI_Module* SPIx, uint16_t DataLen); |
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void SPI_TransmitCrcNext(SPI_Module* SPIx); |
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void SPI_EnableCalculateCrc(SPI_Module* SPIx, FunctionalState Cmd); |
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uint16_t SPI_GetCRCDat(SPI_Module* SPIx, uint8_t SPI_CRC); |
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uint16_t SPI_GetCRCPoly(SPI_Module* SPIx); |
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void SPI_ConfigBidirectionalMode(SPI_Module* SPIx, uint16_t DataDirection); |
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FlagStatus SPI_I2S_GetStatus(SPI_Module* SPIx, uint16_t SPI_I2S_FLAG); |
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void SPI_I2S_ClrCRCErrFlag(SPI_Module* SPIx, uint16_t SPI_I2S_FLAG); |
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INTStatus SPI_I2S_GetIntStatus(SPI_Module* SPIx, uint8_t SPI_I2S_IT); |
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void SPI_I2S_ClrITPendingBit(SPI_Module* SPIx, uint8_t SPI_I2S_IT); |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /*__N32G45X_SPI_H__ */ |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/
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