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814 lines
53 KiB
814 lines
53 KiB
<!doctype html public "-//w3c//dtd html 4.0 transitional//en"> |
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<html><head> |
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<title>Static Call Graph - [.\Objects\BMS.axf]</title></head> |
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<body><HR> |
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<H1>Static Call Graph for image .\Objects\BMS.axf</H1><HR> |
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<BR><P>#<CALLGRAPH># ARM Linker, 5060960: Last Updated: Thu Sep 19 14:26:12 2024 |
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<BR><P> |
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<H3>Maximum Stack Usage = 416 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3> |
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Call chain for Maximum Stack Depth:</H3> |
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main ⇒ Dip_Switch_Read ⇒ PrintBinary ⇒ SEGGER_RTT_printf ⇒ SEGGER_RTT_vprintf ⇒ _PrintInt ⇒ _PrintUnsigned ⇒ _StoreChar ⇒ SEGGER_RTT_Write ⇒ SEGGER_RTT_WriteNoLock ⇒ _WriteBlocking |
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<P> |
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<H3> |
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Mutually Recursive functions |
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</H3> <LI><a href="#[1]">NMI_Handler</a> ⇒ <a href="#[1]">NMI_Handler</a><BR> |
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<LI><a href="#[2]">HardFault_Handler</a> ⇒ <a href="#[2]">HardFault_Handler</a><BR> |
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<LI><a href="#[3]">MemManage_Handler</a> ⇒ <a href="#[3]">MemManage_Handler</a><BR> |
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<LI><a href="#[4]">BusFault_Handler</a> ⇒ <a href="#[4]">BusFault_Handler</a><BR> |
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<LI><a href="#[5]">UsageFault_Handler</a> ⇒ <a href="#[5]">UsageFault_Handler</a><BR> |
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<LI><a href="#[6]">SVC_Handler</a> ⇒ <a href="#[6]">SVC_Handler</a><BR> |
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<LI><a href="#[7]">DebugMon_Handler</a> ⇒ <a href="#[7]">DebugMon_Handler</a><BR> |
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<LI><a href="#[8]">PendSV_Handler</a> ⇒ <a href="#[8]">PendSV_Handler</a><BR> |
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<LI><a href="#[9]">SysTick_Handler</a> ⇒ <a href="#[9]">SysTick_Handler</a><BR> |
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<LI><a href="#[1c]">ADC1_2_IRQHandler</a> ⇒ <a href="#[1c]">ADC1_2_IRQHandler</a><BR> |
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</UL> |
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<P> |
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<H3> |
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Function Pointers |
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</H3><UL> |
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<LI><a href="#[1c]">ADC1_2_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[39]">ADC3_4_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[4]">BusFault_Handler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[1f]">CAN1_RX1_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[20]">CAN1_SCE_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[4a]">CAN2_RX0_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[4b]">CAN2_RX1_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[4c]">CAN2_SCE_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[49]">CAN2_TX_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[5e]">COMP7_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[5c]">COMP_1_2_3_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[5d]">COMP_4_5_6_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[15]">DMA1_Channel1_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[16]">DMA1_Channel2_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[17]">DMA1_Channel3_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[18]">DMA1_Channel4_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[19]">DMA1_Channel5_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[1a]">DMA1_Channel6_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[1b]">DMA1_Channel7_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[56]">DMA1_Channel8_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[42]">DMA2_Channel1_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[43]">DMA2_Channel2_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[44]">DMA2_Channel3_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[45]">DMA2_Channel4_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[46]">DMA2_Channel5_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[4e]">DMA2_Channel6_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[4f]">DMA2_Channel7_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[57]">DMA2_Channel8_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[58]">DVP_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[7]">DebugMon_Handler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[47]">ETH_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[48]">ETH_WKUP_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[32]">EXTI15_10_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[21]">EXTI9_5_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[e]">FLASH_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[2]">HardFault_Handler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[2a]">I2C1_ER_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[29]">I2C1_EV_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[2c]">I2C2_ER_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[2b]">I2C2_EV_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[51]">I2C3_ER_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[50]">I2C3_EV_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[53]">I2C4_ER_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[52]">I2C4_EV_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[5a]">MMU_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[3]">MemManage_Handler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[1]">NMI_Handler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[b]">PVD_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[8]">PendSV_Handler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[4d]">QSPI_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[f]">RCC_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[5f]">RSRAM_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[33]">RTCAlarm_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[d]">RTC_WKUP_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[63]">Reset_Handler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[59]">SAC_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[3b]">SDIO_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[2d]">SPI1_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[2e]">SPI2_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[3d]">SPI3_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[6]">SVC_Handler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[9]">SysTick_Handler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[61]">SystemInit</a> from system_n32g45x.o(i.SystemInit) referenced from startup_n32g45x.o(.text) |
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<LI><a href="#[c]">TAMPER_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[22]">TIM1_BRK_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[25]">TIM1_CC_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[24]">TIM1_TRG_COM_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[23]">TIM1_UP_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[26]">TIM2_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[27]">TIM3_IRQHandler</a> from tim3.o(i.TIM3_IRQHandler) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[28]">TIM4_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[3c]">TIM5_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[40]">TIM6_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[41]">TIM7_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[35]">TIM8_BRK_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[38]">TIM8_CC_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[37]">TIM8_TRG_COM_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[36]">TIM8_UP_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[5b]">TSC_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[3e]">UART4_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[3f]">UART5_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[54]">UART6_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[55]">UART7_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[2f]">USART1_IRQHandler</a> from usart1.o(i.USART1_IRQHandler) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[30]">USART2_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[31]">USART3_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[34]">USBWakeUp_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[1d]">USB_HP_CAN1_TX_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[1e]">USB_LP_CAN1_RX0_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[5]">UsageFault_Handler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[a]">WWDG_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[3a]">XFMC_IRQHandler</a> from startup_n32g45x.o(.text) referenced from startup_n32g45x.o(RESET) |
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<LI><a href="#[62]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_n32g45x.o(.text) |
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<LI><a href="#[60]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B) |
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</UL> |
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<P> |
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<H3> |
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Global Symbols |
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</H3> |
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<P><STRONG><a name="[62]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000)) |
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<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(.text) |
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</UL> |
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<P><STRONG><a name="[8e]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001)) |
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<P><STRONG><a name="[64]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004)) |
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<BR><BR>[Calls]<UL><LI><a href="#[65]">>></a> __scatterload |
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</UL> |
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<P><STRONG><a name="[66]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004)) |
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<BR><BR>[Called By]<UL><LI><a href="#[65]">>></a> __scatterload |
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</UL> |
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<P><STRONG><a name="[8f]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008)) |
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<P><STRONG><a name="[90]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A)) |
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<P><STRONG><a name="[91]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B)) |
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<P><STRONG><a name="[92]"></a>__rt_lib_shutdown_fini</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry12b.o(.ARM.Collect$$$$0000000E)) |
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<P><STRONG><a name="[93]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000F)) |
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<P><STRONG><a name="[94]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$00000011)) |
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<P><STRONG><a name="[63]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
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<P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
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<BR><BR>[Calls]<UL><LI><a href="#[1]">>></a> NMI_Handler |
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</UL> |
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<BR>[Called By]<UL><LI><a href="#[1]">>></a> NMI_Handler |
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</UL> |
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<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
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</UL> |
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<P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
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<BR><BR>[Calls]<UL><LI><a href="#[2]">>></a> HardFault_Handler |
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</UL> |
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<BR>[Called By]<UL><LI><a href="#[2]">>></a> HardFault_Handler |
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</UL> |
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<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
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</UL> |
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<P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
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<BR><BR>[Calls]<UL><LI><a href="#[3]">>></a> MemManage_Handler |
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</UL> |
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<BR>[Called By]<UL><LI><a href="#[3]">>></a> MemManage_Handler |
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</UL> |
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<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
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</UL> |
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<P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
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<BR><BR>[Calls]<UL><LI><a href="#[4]">>></a> BusFault_Handler |
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</UL> |
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<BR>[Called By]<UL><LI><a href="#[4]">>></a> BusFault_Handler |
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</UL> |
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<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
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</UL> |
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<P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
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<BR><BR>[Calls]<UL><LI><a href="#[5]">>></a> UsageFault_Handler |
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</UL> |
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<BR>[Called By]<UL><LI><a href="#[5]">>></a> UsageFault_Handler |
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</UL> |
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<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
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</UL> |
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<P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
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<BR><BR>[Calls]<UL><LI><a href="#[6]">>></a> SVC_Handler |
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</UL> |
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<BR>[Called By]<UL><LI><a href="#[6]">>></a> SVC_Handler |
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</UL> |
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<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
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</UL> |
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<P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
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<BR><BR>[Calls]<UL><LI><a href="#[7]">>></a> DebugMon_Handler |
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</UL> |
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<BR>[Called By]<UL><LI><a href="#[7]">>></a> DebugMon_Handler |
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</UL> |
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<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
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</UL> |
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<P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
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<BR><BR>[Calls]<UL><LI><a href="#[8]">>></a> PendSV_Handler |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[8]">>></a> PendSV_Handler |
|
</UL> |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR><BR>[Calls]<UL><LI><a href="#[9]">>></a> SysTick_Handler |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[9]">>></a> SysTick_Handler |
|
</UL> |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[1c]"></a>ADC1_2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR><BR>[Calls]<UL><LI><a href="#[1c]">>></a> ADC1_2_IRQHandler |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[1c]">>></a> ADC1_2_IRQHandler |
|
</UL> |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[39]"></a>ADC3_4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[1f]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[20]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[4a]"></a>CAN2_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[4b]"></a>CAN2_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[4c]"></a>CAN2_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[49]"></a>CAN2_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[5e]"></a>COMP7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[5c]"></a>COMP_1_2_3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[5d]"></a>COMP_4_5_6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[15]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[16]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[17]"></a>DMA1_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[18]"></a>DMA1_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[19]"></a>DMA1_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[1a]"></a>DMA1_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[1b]"></a>DMA1_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[56]"></a>DMA1_Channel8_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[42]"></a>DMA2_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[43]"></a>DMA2_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[44]"></a>DMA2_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[45]"></a>DMA2_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[46]"></a>DMA2_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[4e]"></a>DMA2_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[4f]"></a>DMA2_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[57]"></a>DMA2_Channel8_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[58]"></a>DVP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[47]"></a>ETH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[48]"></a>ETH_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[32]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[21]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[e]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[2a]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[29]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[2c]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[2b]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[51]"></a>I2C3_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[50]"></a>I2C3_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[53]"></a>I2C4_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[52]"></a>I2C4_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[5a]"></a>MMU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[b]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[4d]"></a>QSPI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[f]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[5f]"></a>RSRAM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[33]"></a>RTCAlarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[d]"></a>RTC_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[59]"></a>SAC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[3b]"></a>SDIO_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[2d]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[2e]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[3d]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[c]"></a>TAMPER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[22]"></a>TIM1_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[25]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[24]"></a>TIM1_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[23]"></a>TIM1_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[26]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[28]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[3c]"></a>TIM5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[40]"></a>TIM6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[41]"></a>TIM7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[35]"></a>TIM8_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[38]"></a>TIM8_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[37]"></a>TIM8_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[36]"></a>TIM8_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[5b]"></a>TSC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[3e]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[3f]"></a>UART5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[54]"></a>UART6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[55]"></a>UART7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[30]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[31]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[34]"></a>USBWakeUp_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[1d]"></a>USB_HP_CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[1e]"></a>USB_LP_CAN1_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[a]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[3a]"></a>XFMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_n32g45x.o(.text)) |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[8c]"></a>__aeabi_memcpy</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, memcpya.o(.text)) |
|
<BR><BR>[Called By]<UL><LI><a href="#[7a]">>></a> _WriteNoCheck |
|
<LI><a href="#[7b]">>></a> _WriteBlocking |
|
</UL> |
|
|
|
<P><STRONG><a name="[95]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED) |
|
|
|
<P><STRONG><a name="[96]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED) |
|
|
|
<P><STRONG><a name="[8b]"></a>strcpy</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, strcpy.o(.text)) |
|
<BR><BR>[Called By]<UL><LI><a href="#[77]">>></a> _DoInit |
|
</UL> |
|
|
|
<P><STRONG><a name="[65]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text)) |
|
<BR><BR>[Calls]<UL><LI><a href="#[66]">>></a> __main_after_scatterload |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[64]">>></a> _main_scatterload |
|
</UL> |
|
|
|
<P><STRONG><a name="[97]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED) |
|
|
|
<P><STRONG><a name="[67]"></a>Cmd_Parse</STRONG> (Thumb, 188 bytes, Stack size 8 bytes, usart1.o(i.Cmd_Parse)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = Cmd_Parse ⇒ Set_IAP_UpdateFlag ⇒ Write_IAP_UpdateFlag ⇒ FLASH_ProgramWord ⇒ FLASH_WaitForLastOpt |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[69]">>></a> Set_IAP_UpdateFlag |
|
<LI><a href="#[68]">>></a> Usart_SendArray |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[2f]">>></a> USART1_IRQHandler |
|
</UL> |
|
|
|
<P><STRONG><a name="[6a]"></a>Dip_Switch_Init</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, dip_switch.o(i.Dip_Switch_Init)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = Dip_Switch_Init ⇒ GPIO_InitPeripheral |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[6b]">>></a> RCC_EnableAPB2PeriphClk |
|
<LI><a href="#[6c]">>></a> GPIO_InitPeripheral |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[60]">>></a> main |
|
</UL> |
|
|
|
<P><STRONG><a name="[6d]"></a>Dip_Switch_Read</STRONG> (Thumb, 90 bytes, Stack size 16 bytes, dip_switch.o(i.Dip_Switch_Read)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 416<LI>Call Chain = Dip_Switch_Read ⇒ PrintBinary ⇒ SEGGER_RTT_printf ⇒ SEGGER_RTT_vprintf ⇒ _PrintInt ⇒ _PrintUnsigned ⇒ _StoreChar ⇒ SEGGER_RTT_Write ⇒ SEGGER_RTT_WriteNoLock ⇒ _WriteBlocking |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[6e]">>></a> GPIO_ReadInputDataBit |
|
<LI><a href="#[6f]">>></a> PrintBinary |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[60]">>></a> main |
|
</UL> |
|
|
|
<P><STRONG><a name="[71]"></a>FLASH_ClearFlag</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, n32g45x_flash.o(i.FLASH_ClearFlag)) |
|
<BR><BR>[Called By]<UL><LI><a href="#[73]">>></a> FLASH_ProgramWord |
|
<LI><a href="#[70]">>></a> FLASH_EraseOnePage |
|
</UL> |
|
|
|
<P><STRONG><a name="[70]"></a>FLASH_EraseOnePage</STRONG> (Thumb, 78 bytes, Stack size 12 bytes, n32g45x_flash.o(i.FLASH_EraseOnePage)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = FLASH_EraseOnePage ⇒ FLASH_WaitForLastOpt |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[72]">>></a> FLASH_WaitForLastOpt |
|
<LI><a href="#[71]">>></a> FLASH_ClearFlag |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[80]">>></a> Write_IAP_UpdateFlag |
|
</UL> |
|
|
|
<P><STRONG><a name="[74]"></a>FLASH_GetSTS</STRONG> (Thumb, 76 bytes, Stack size 0 bytes, n32g45x_flash.o(i.FLASH_GetSTS)) |
|
<BR><BR>[Called By]<UL><LI><a href="#[72]">>></a> FLASH_WaitForLastOpt |
|
</UL> |
|
|
|
<P><STRONG><a name="[8a]"></a>FLASH_Lock</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, n32g45x_flash.o(i.FLASH_Lock)) |
|
<BR><BR>[Called By]<UL><LI><a href="#[80]">>></a> Write_IAP_UpdateFlag |
|
</UL> |
|
|
|
<P><STRONG><a name="[73]"></a>FLASH_ProgramWord</STRONG> (Thumb, 86 bytes, Stack size 20 bytes, n32g45x_flash.o(i.FLASH_ProgramWord)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = FLASH_ProgramWord ⇒ FLASH_WaitForLastOpt |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[72]">>></a> FLASH_WaitForLastOpt |
|
<LI><a href="#[71]">>></a> FLASH_ClearFlag |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[80]">>></a> Write_IAP_UpdateFlag |
|
</UL> |
|
|
|
<P><STRONG><a name="[89]"></a>FLASH_Unlock</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, n32g45x_flash.o(i.FLASH_Unlock)) |
|
<BR><BR>[Called By]<UL><LI><a href="#[80]">>></a> Write_IAP_UpdateFlag |
|
</UL> |
|
|
|
<P><STRONG><a name="[72]"></a>FLASH_WaitForLastOpt</STRONG> (Thumb, 38 bytes, Stack size 4 bytes, n32g45x_flash.o(i.FLASH_WaitForLastOpt)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = FLASH_WaitForLastOpt |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[74]">>></a> FLASH_GetSTS |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[73]">>></a> FLASH_ProgramWord |
|
<LI><a href="#[70]">>></a> FLASH_EraseOnePage |
|
</UL> |
|
|
|
<P><STRONG><a name="[6c]"></a>GPIO_InitPeripheral</STRONG> (Thumb, 278 bytes, Stack size 24 bytes, n32g45x_gpio.o(i.GPIO_InitPeripheral)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = GPIO_InitPeripheral |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[6a]">>></a> Dip_Switch_Init |
|
</UL> |
|
|
|
<P><STRONG><a name="[6e]"></a>GPIO_ReadInputDataBit</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, n32g45x_gpio.o(i.GPIO_ReadInputDataBit)) |
|
<BR><BR>[Called By]<UL><LI><a href="#[6d]">>></a> Dip_Switch_Read |
|
</UL> |
|
|
|
<P><STRONG><a name="[6b]"></a>RCC_EnableAPB2PeriphClk</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, n32g45x_rcc.o(i.RCC_EnableAPB2PeriphClk)) |
|
<BR><BR>[Called By]<UL><LI><a href="#[6a]">>></a> Dip_Switch_Init |
|
</UL> |
|
|
|
<P><STRONG><a name="[76]"></a>SEGGER_RTT_Write</STRONG> (Thumb, 68 bytes, Stack size 24 bytes, segger_rtt.o(i.SEGGER_RTT_Write)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = SEGGER_RTT_Write ⇒ SEGGER_RTT_WriteNoLock ⇒ _WriteBlocking |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[77]">>></a> _DoInit |
|
<LI><a href="#[78]">>></a> SEGGER_RTT_WriteNoLock |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[7c]">>></a> SEGGER_RTT_vprintf |
|
<LI><a href="#[7d]">>></a> _StoreChar |
|
</UL> |
|
|
|
<P><STRONG><a name="[78]"></a>SEGGER_RTT_WriteNoLock</STRONG> (Thumb, 126 bytes, Stack size 32 bytes, segger_rtt.o(i.SEGGER_RTT_WriteNoLock)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = SEGGER_RTT_WriteNoLock ⇒ _WriteBlocking |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[7a]">>></a> _WriteNoCheck |
|
<LI><a href="#[7b]">>></a> _WriteBlocking |
|
<LI><a href="#[79]">>></a> _GetAvailWriteSpace |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[76]">>></a> SEGGER_RTT_Write |
|
</UL> |
|
|
|
<P><STRONG><a name="[75]"></a>SEGGER_RTT_printf</STRONG> (Thumb, 34 bytes, Stack size 32 bytes, segger_rtt_printf.o(i.SEGGER_RTT_printf)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 376<LI>Call Chain = SEGGER_RTT_printf ⇒ SEGGER_RTT_vprintf ⇒ _PrintInt ⇒ _PrintUnsigned ⇒ _StoreChar ⇒ SEGGER_RTT_Write ⇒ SEGGER_RTT_WriteNoLock ⇒ _WriteBlocking |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[7c]">>></a> SEGGER_RTT_vprintf |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[6f]">>></a> PrintBinary |
|
</UL> |
|
|
|
<P><STRONG><a name="[7c]"></a>SEGGER_RTT_vprintf</STRONG> (Thumb, 522 bytes, Stack size 136 bytes, segger_rtt_printf.o(i.SEGGER_RTT_vprintf)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 344<LI>Call Chain = SEGGER_RTT_vprintf ⇒ _PrintInt ⇒ _PrintUnsigned ⇒ _StoreChar ⇒ SEGGER_RTT_Write ⇒ SEGGER_RTT_WriteNoLock ⇒ _WriteBlocking |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[7d]">>></a> _StoreChar |
|
<LI><a href="#[7f]">>></a> _PrintUnsigned |
|
<LI><a href="#[7e]">>></a> _PrintInt |
|
<LI><a href="#[76]">>></a> SEGGER_RTT_Write |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[75]">>></a> SEGGER_RTT_printf |
|
</UL> |
|
|
|
<P><STRONG><a name="[69]"></a>Set_IAP_UpdateFlag</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, iap.o(i.Set_IAP_UpdateFlag)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = Set_IAP_UpdateFlag ⇒ Write_IAP_UpdateFlag ⇒ FLASH_ProgramWord ⇒ FLASH_WaitForLastOpt |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[80]">>></a> Write_IAP_UpdateFlag |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[67]">>></a> Cmd_Parse |
|
</UL> |
|
|
|
<P><STRONG><a name="[61]"></a>SystemInit</STRONG> (Thumb, 146 bytes, Stack size 8 bytes, system_n32g45x.o(i.SystemInit)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SystemInit ⇒ SetSysClock |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[81]">>></a> SetSysClock |
|
</UL> |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(.text) |
|
</UL> |
|
<P><STRONG><a name="[27]"></a>TIM3_IRQHandler</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, tim3.o(i.TIM3_IRQHandler)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM3_IRQHandler ⇒ TIM_GetIntStatus |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[82]">>></a> TIM_GetIntStatus |
|
<LI><a href="#[83]">>></a> TIM_ClrIntPendingBit |
|
</UL> |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[83]"></a>TIM_ClrIntPendingBit</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, n32g45x_tim.o(i.TIM_ClrIntPendingBit)) |
|
<BR><BR>[Called By]<UL><LI><a href="#[27]">>></a> TIM3_IRQHandler |
|
</UL> |
|
|
|
<P><STRONG><a name="[82]"></a>TIM_GetIntStatus</STRONG> (Thumb, 34 bytes, Stack size 12 bytes, n32g45x_tim.o(i.TIM_GetIntStatus)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_GetIntStatus |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[27]">>></a> TIM3_IRQHandler |
|
</UL> |
|
|
|
<P><STRONG><a name="[2f]"></a>USART1_IRQHandler</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, usart1.o(i.USART1_IRQHandler)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = USART1_IRQHandler ⇒ Cmd_Parse ⇒ Set_IAP_UpdateFlag ⇒ Write_IAP_UpdateFlag ⇒ FLASH_ProgramWord ⇒ FLASH_WaitForLastOpt |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[67]">>></a> Cmd_Parse |
|
<LI><a href="#[86]">>></a> USART_ReceiveData |
|
<LI><a href="#[84]">>></a> USART_GetFlagStatus |
|
<LI><a href="#[85]">>></a> USART_ClrIntPendingBit |
|
</UL> |
|
<BR>[Address Reference Count : 1]<UL><LI> startup_n32g45x.o(RESET) |
|
</UL> |
|
<P><STRONG><a name="[85]"></a>USART_ClrIntPendingBit</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, n32g45x_usart.o(i.USART_ClrIntPendingBit)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = USART_ClrIntPendingBit |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[2f]">>></a> USART1_IRQHandler |
|
</UL> |
|
|
|
<P><STRONG><a name="[84]"></a>USART_GetFlagStatus</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, n32g45x_usart.o(i.USART_GetFlagStatus)) |
|
<BR><BR>[Called By]<UL><LI><a href="#[68]">>></a> Usart_SendArray |
|
<LI><a href="#[2f]">>></a> USART1_IRQHandler |
|
<LI><a href="#[87]">>></a> Usart_SendByte |
|
</UL> |
|
|
|
<P><STRONG><a name="[86]"></a>USART_ReceiveData</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, n32g45x_usart.o(i.USART_ReceiveData)) |
|
<BR><BR>[Called By]<UL><LI><a href="#[2f]">>></a> USART1_IRQHandler |
|
</UL> |
|
|
|
<P><STRONG><a name="[88]"></a>USART_SendData</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, n32g45x_usart.o(i.USART_SendData)) |
|
<BR><BR>[Called By]<UL><LI><a href="#[87]">>></a> Usart_SendByte |
|
</UL> |
|
|
|
<P><STRONG><a name="[68]"></a>Usart_SendArray</STRONG> (Thumb, 48 bytes, Stack size 24 bytes, usart1.o(i.Usart_SendArray)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = Usart_SendArray ⇒ Usart_SendByte |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[87]">>></a> Usart_SendByte |
|
<LI><a href="#[84]">>></a> USART_GetFlagStatus |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[67]">>></a> Cmd_Parse |
|
</UL> |
|
|
|
<P><STRONG><a name="[98]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED) |
|
|
|
<P><STRONG><a name="[99]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED) |
|
|
|
<P><STRONG><a name="[9a]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED) |
|
|
|
<P><STRONG><a name="[8d]"></a>delay_ms</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, delay.o(i.delay_ms)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = delay_ms |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[60]">>></a> main |
|
</UL> |
|
|
|
<P><STRONG><a name="[60]"></a>main</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, main.o(i.main)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 416<LI>Call Chain = main ⇒ Dip_Switch_Read ⇒ PrintBinary ⇒ SEGGER_RTT_printf ⇒ SEGGER_RTT_vprintf ⇒ _PrintInt ⇒ _PrintUnsigned ⇒ _StoreChar ⇒ SEGGER_RTT_Write ⇒ SEGGER_RTT_WriteNoLock ⇒ _WriteBlocking |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[6d]">>></a> Dip_Switch_Read |
|
<LI><a href="#[6a]">>></a> Dip_Switch_Init |
|
<LI><a href="#[8d]">>></a> delay_ms |
|
</UL> |
|
<BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B) |
|
</UL><P> |
|
<H3> |
|
Local Symbols |
|
</H3> |
|
<P><STRONG><a name="[81]"></a>SetSysClock</STRONG> (Thumb, 200 bytes, Stack size 8 bytes, system_n32g45x.o(i.SetSysClock)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SetSysClock |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[61]">>></a> SystemInit |
|
</UL> |
|
|
|
<P><STRONG><a name="[87]"></a>Usart_SendByte</STRONG> (Thumb, 30 bytes, Stack size 16 bytes, usart1.o(i.Usart_SendByte)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = Usart_SendByte |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[88]">>></a> USART_SendData |
|
<LI><a href="#[84]">>></a> USART_GetFlagStatus |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[68]">>></a> Usart_SendArray |
|
</UL> |
|
|
|
<P><STRONG><a name="[80]"></a>Write_IAP_UpdateFlag</STRONG> (Thumb, 42 bytes, Stack size 8 bytes, iap.o(i.Write_IAP_UpdateFlag)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = Write_IAP_UpdateFlag ⇒ FLASH_ProgramWord ⇒ FLASH_WaitForLastOpt |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[89]">>></a> FLASH_Unlock |
|
<LI><a href="#[73]">>></a> FLASH_ProgramWord |
|
<LI><a href="#[8a]">>></a> FLASH_Lock |
|
<LI><a href="#[70]">>></a> FLASH_EraseOnePage |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[69]">>></a> Set_IAP_UpdateFlag |
|
</UL> |
|
|
|
<P><STRONG><a name="[6f]"></a>PrintBinary</STRONG> (Thumb, 66 bytes, Stack size 24 bytes, dip_switch.o(i.PrintBinary)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 400<LI>Call Chain = PrintBinary ⇒ SEGGER_RTT_printf ⇒ SEGGER_RTT_vprintf ⇒ _PrintInt ⇒ _PrintUnsigned ⇒ _StoreChar ⇒ SEGGER_RTT_Write ⇒ SEGGER_RTT_WriteNoLock ⇒ _WriteBlocking |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[75]">>></a> SEGGER_RTT_printf |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[6d]">>></a> Dip_Switch_Read |
|
</UL> |
|
|
|
<P><STRONG><a name="[77]"></a>_DoInit</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, segger_rtt.o(i._DoInit)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _DoInit |
|
</UL> |
|
<BR>[Calls]<UL><LI><a href="#[8b]">>></a> strcpy |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[76]">>></a> SEGGER_RTT_Write |
|
</UL> |
|
|
|
<P><STRONG><a name="[79]"></a>_GetAvailWriteSpace</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, segger_rtt.o(i._GetAvailWriteSpace)) |
|
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _GetAvailWriteSpace |
|
</UL> |
|
<BR>[Called By]<UL><LI><a href="#[78]">>></a> SEGGER_RTT_WriteNoLock |
|
</UL> |
|
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<P><STRONG><a name="[7b]"></a>_WriteBlocking</STRONG> (Thumb, 118 bytes, Stack size 40 bytes, segger_rtt.o(i._WriteBlocking)) |
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<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = _WriteBlocking |
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</UL> |
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<BR>[Calls]<UL><LI><a href="#[8c]">>></a> __aeabi_memcpy |
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</UL> |
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<BR>[Called By]<UL><LI><a href="#[78]">>></a> SEGGER_RTT_WriteNoLock |
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</UL> |
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<P><STRONG><a name="[7a]"></a>_WriteNoCheck</STRONG> (Thumb, 88 bytes, Stack size 32 bytes, segger_rtt.o(i._WriteNoCheck)) |
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<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = _WriteNoCheck |
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</UL> |
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<BR>[Calls]<UL><LI><a href="#[8c]">>></a> __aeabi_memcpy |
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</UL> |
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<BR>[Called By]<UL><LI><a href="#[78]">>></a> SEGGER_RTT_WriteNoLock |
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</UL> |
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<P><STRONG><a name="[7e]"></a>_PrintInt</STRONG> (Thumb, 236 bytes, Stack size 48 bytes, segger_rtt_printf.o(i._PrintInt)) |
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<BR><BR>[Stack]<UL><LI>Max Depth = 208<LI>Call Chain = _PrintInt ⇒ _PrintUnsigned ⇒ _StoreChar ⇒ SEGGER_RTT_Write ⇒ SEGGER_RTT_WriteNoLock ⇒ _WriteBlocking |
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</UL> |
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<BR>[Calls]<UL><LI><a href="#[7d]">>></a> _StoreChar |
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<LI><a href="#[7f]">>></a> _PrintUnsigned |
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</UL> |
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<BR>[Called By]<UL><LI><a href="#[7c]">>></a> SEGGER_RTT_vprintf |
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</UL> |
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<P><STRONG><a name="[7f]"></a>_PrintUnsigned</STRONG> (Thumb, 230 bytes, Stack size 48 bytes, segger_rtt_printf.o(i._PrintUnsigned)) |
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<BR><BR>[Stack]<UL><LI>Max Depth = 160<LI>Call Chain = _PrintUnsigned ⇒ _StoreChar ⇒ SEGGER_RTT_Write ⇒ SEGGER_RTT_WriteNoLock ⇒ _WriteBlocking |
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</UL> |
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<BR>[Calls]<UL><LI><a href="#[7d]">>></a> _StoreChar |
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</UL> |
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<BR>[Called By]<UL><LI><a href="#[7c]">>></a> SEGGER_RTT_vprintf |
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<LI><a href="#[7e]">>></a> _PrintInt |
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</UL> |
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<P><STRONG><a name="[7d]"></a>_StoreChar</STRONG> (Thumb, 68 bytes, Stack size 16 bytes, segger_rtt_printf.o(i._StoreChar)) |
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<BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = _StoreChar ⇒ SEGGER_RTT_Write ⇒ SEGGER_RTT_WriteNoLock ⇒ _WriteBlocking |
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</UL> |
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<BR>[Calls]<UL><LI><a href="#[76]">>></a> SEGGER_RTT_Write |
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</UL> |
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<BR>[Called By]<UL><LI><a href="#[7c]">>></a> SEGGER_RTT_vprintf |
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<LI><a href="#[7f]">>></a> _PrintUnsigned |
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<LI><a href="#[7e]">>></a> _PrintInt |
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</UL> |
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<P> |
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<H3> |
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Undefined Global Symbols |
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</H3><HR></body></html>
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