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495 lines
18 KiB
495 lines
18 KiB
2 days ago
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/*****************************************************************************
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* Copyright (c) 2019, Nations Technologies Inc.
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*
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* All rights reserved.
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* ****************************************************************************
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* Nations' name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY NATIONS "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL NATIONS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ****************************************************************************/
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/**
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* @file n32g45x_sdio.h
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* @author Nations
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* @version v1.0.1
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*
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* @copyright Copyright (c) 2019, Nations Technologies Inc. All rights reserved.
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*/
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#ifndef __N32G45X_SDIO_H__
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#define __N32G45X_SDIO_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "n32g45x.h"
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/** @addtogroup N32G45X_StdPeriph_Driver
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* @{
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*/
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/** @addtogroup SDIO
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* @{
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*/
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/** @addtogroup SDIO_Exported_Types
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* @{
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*/
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typedef struct
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{
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uint32_t ClkEdge; /*!< Specifies the clock transition on which the bit capture is made.
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This parameter can be a value of @ref SDIO_Clock_Edge */
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uint32_t ClkBypass; /*!< Specifies whether the SDIO Clock divider bypass is
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enabled or disabled.
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This parameter can be a value of @ref SDIO_Clock_Bypass */
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uint32_t ClkPwrSave; /*!< Specifies whether SDIO Clock output is enabled or
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disabled when the bus is idle.
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This parameter can be a value of @ref SDIO_Clock_Power_Save */
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uint32_t BusWidth; /*!< Specifies the SDIO bus width.
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This parameter can be a value of @ref SDIO_Bus_Wide */
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uint32_t HardwareClkCtrl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled.
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This parameter can be a value of @ref SDIO_Hardware_Flow_Control */
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uint8_t ClkDiv; /*!< Specifies the clock frequency of the SDIO controller.
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This parameter can be a value between 0x00 and 0xFF. */
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} SDIO_InitType;
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typedef struct
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{
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uint32_t CmdArgument; /*!< Specifies the SDIO command argument which is sent
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to a card as part of a command message. If a command
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contains an argument, it must be loaded into this register
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before writing the command to the command register */
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uint32_t CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */
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uint32_t ResponseType; /*!< Specifies the SDIO response type.
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This parameter can be a value of @ref SDIO_Response_Type */
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uint32_t WaitType; /*!< Specifies whether SDIO wait-for-interrupt request is enabled or disabled.
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This parameter can be a value of @ref SDIO_Wait_Interrupt_State */
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uint32_t CPSMConfig; /*!< Specifies whether SDIO Command path state machine (CPSM)
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is enabled or disabled.
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This parameter can be a value of @ref SDIO_CPSM_State */
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} SDIO_CmdInitType;
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typedef struct
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{
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uint32_t DatTimeout; /*!< Specifies the data timeout period in card bus clock periods. */
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uint32_t DatLen; /*!< Specifies the number of data bytes to be transferred. */
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uint32_t DatBlkSize; /*!< Specifies the data block size for block transfer.
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This parameter can be a value of @ref SDIO_Data_Block_Size */
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uint32_t TransferDirection; /*!< Specifies the data transfer direction, whether the transfer
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is a read or write.
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This parameter can be a value of @ref SDIO_Transfer_Direction */
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uint32_t TransferMode; /*!< Specifies whether data transfer is in stream or block mode.
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This parameter can be a value of @ref SDIO_Transfer_Type */
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uint32_t DPSMConfig; /*!< Specifies whether SDIO Data path state machine (DPSM)
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is enabled or disabled.
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This parameter can be a value of @ref SDIO_DPSM_State */
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} SDIO_DataInitType;
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/**
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* @}
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*/
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/** @addtogroup SDIO_Exported_Constants
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* @{
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*/
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/** @addtogroup SDIO_Clock_Edge
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* @{
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*/
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#define SDIO_CLKEDGE_RISING ((uint32_t)0x00000000)
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#define SDIO_CLKEDGE_FALLING ((uint32_t)0x00002000)
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#define IS_SDIO_CLK_EDGE(EDGE) (((EDGE) == SDIO_CLKEDGE_RISING) || ((EDGE) == SDIO_CLKEDGE_FALLING))
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/**
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* @}
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*/
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/** @addtogroup SDIO_Clock_Bypass
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* @{
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*/
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#define SDIO_ClkBYPASS_DISABLE ((uint32_t)0x00000000)
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#define SDIO_ClkBYPASS_ENABLE ((uint32_t)0x00000400)
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#define IS_SDIO_CLK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClkBYPASS_DISABLE) || ((BYPASS) == SDIO_ClkBYPASS_ENABLE))
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/**
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* @}
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*/
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/** @addtogroup SDIO_Clock_Power_Save
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* @{
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*/
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#define SDIO_CLKPOWERSAVE_DISABLE ((uint32_t)0x00000000)
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#define SDIO_CLKPOWERSAVE_ENABLE ((uint32_t)0x00000200)
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#define IS_SDIO_CLK_POWER_SAVE(SAVE) (((SAVE) == SDIO_CLKPOWERSAVE_DISABLE) || ((SAVE) == SDIO_CLKPOWERSAVE_ENABLE))
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/**
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* @}
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*/
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/** @addtogroup SDIO_Bus_Wide
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* @{
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*/
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#define SDIO_BUSWIDTH_1B ((uint32_t)0x00000000)
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#define SDIO_BUSWIDTH_4B ((uint32_t)0x00000800)
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#define SDIO_BUSWIDTH_8B ((uint32_t)0x00001000)
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#define IS_SDIO_BUS_WIDTH(WIDE) \
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(((WIDE) == SDIO_BUSWIDTH_1B) || ((WIDE) == SDIO_BUSWIDTH_4B) || ((WIDE) == SDIO_BUSWIDTH_8B))
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/**
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* @}
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*/
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/** @addtogroup SDIO_Hardware_Flow_Control
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* @{
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*/
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#define SDIO_HARDWARE_CLKCTRL_DISABLE ((uint32_t)0x00000000)
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#define SDIO_HARDWARE_CLKCTRL_ENABLE ((uint32_t)0x00004000)
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#define IS_SDIO_HARDWARE_CLKCTRL(CONTROL) \
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(((CONTROL) == SDIO_HARDWARE_CLKCTRL_DISABLE) || ((CONTROL) == SDIO_HARDWARE_CLKCTRL_ENABLE))
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/**
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* @}
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*/
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/** @addtogroup SDIO_Power_State
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* @{
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*/
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#define SDIO_POWER_CTRL_OFF ((uint32_t)0x00000000)
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#define SDIO_POWER_CTRL_ON ((uint32_t)0x00000003)
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#define IS_SDIO_POWER_CTRL(STATE) (((STATE) == SDIO_POWER_CTRL_OFF) || ((STATE) == SDIO_POWER_CTRL_ON))
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/**
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* @}
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*/
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/** @addtogroup SDIO_Interrupt_sources
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* @{
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*/
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#define SDIO_INT_CCRCERR ((uint32_t)0x00000001)
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#define SDIO_INT_DCRCERR ((uint32_t)0x00000002)
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#define SDIO_INT_CMDTIMEOUT ((uint32_t)0x00000004)
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#define SDIO_INT_DATTIMEOUT ((uint32_t)0x00000008)
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#define SDIO_INT_TXURERR ((uint32_t)0x00000010)
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#define SDIO_INT_RXORERR ((uint32_t)0x00000020)
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#define SDIO_INT_CMDRESPRECV ((uint32_t)0x00000040)
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#define SDIO_INT_CMDSEND ((uint32_t)0x00000080)
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#define SDIO_INT_DATEND ((uint32_t)0x00000100)
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#define SDIO_INT_SBERR ((uint32_t)0x00000200)
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#define SDIO_INT_DATBLKEND ((uint32_t)0x00000400)
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#define SDIO_INT_CMDRUN ((uint32_t)0x00000800)
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#define SDIO_INT_TXRUN ((uint32_t)0x00001000)
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#define SDIO_INT_RXRUN ((uint32_t)0x00002000)
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#define SDIO_INT_TFIFOHE ((uint32_t)0x00004000)
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#define SDIO_INT_RFIFOHF ((uint32_t)0x00008000)
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#define SDIO_INT_TFIFOF ((uint32_t)0x00010000)
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#define SDIO_INT_RFIFOF ((uint32_t)0x00020000)
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#define SDIO_INT_TFIFOE ((uint32_t)0x00040000)
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#define SDIO_INT_RFIFOE ((uint32_t)0x00080000)
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#define SDIO_INT_TDATVALID ((uint32_t)0x00100000)
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#define SDIO_INT_RDATVALID ((uint32_t)0x00200000)
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#define SDIO_INT_SDIOINT ((uint32_t)0x00400000)
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#define SDIO_INT_CEATAF ((uint32_t)0x00800000)
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#define IS_SDIO_INT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00))
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/**
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* @}
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*/
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/** @addtogroup SDIO_Command_Index
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* @{
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*/
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#define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40)
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/**
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* @}
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*/
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/** @addtogroup SDIO_Response_Type
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* @{
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*/
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#define SDIO_RESP_NO ((uint32_t)0x00000000)
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#define SDIO_RESP_SHORT ((uint32_t)0x00000040)
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#define SDIO_RESP_LONG ((uint32_t)0x000000C0)
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#define IS_SDIO_RESP(RESPONSE) \
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(((RESPONSE) == SDIO_RESP_NO) || ((RESPONSE) == SDIO_RESP_SHORT) || ((RESPONSE) == SDIO_RESP_LONG))
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/**
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* @}
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*/
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/** @addtogroup SDIO_Wait_Interrupt_State
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* @{
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*/
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#define SDIO_WAIT_NO ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */
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#define SDIO_WAIT_INT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */
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#define SDIO_WAIT_PEND ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */
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#define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_WAIT_NO) || ((WAIT) == SDIO_WAIT_INT) || ((WAIT) == SDIO_WAIT_PEND))
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/**
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* @}
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*/
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/** @addtogroup SDIO_CPSM_State
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* @{
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*/
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#define SDIO_CPSM_DISABLE ((uint32_t)0x00000000)
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#define SDIO_CPSM_ENABLE ((uint32_t)0x00000400)
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#define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_ENABLE) || ((CPSM) == SDIO_CPSM_DISABLE))
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/**
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* @}
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*/
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/** @addtogroup SDIO_Response_Registers
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* @{
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*/
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#define SDIO_RESPONSE_1 ((uint32_t)0x00000000)
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#define SDIO_RESPONSE_2 ((uint32_t)0x00000004)
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#define SDIO_RESPONSE_3 ((uint32_t)0x00000008)
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#define SDIO_RESPONSE_4 ((uint32_t)0x0000000C)
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#define IS_SDIO_RESPONSE(RESP) \
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(((RESP) == SDIO_RESPONSE_1) || ((RESP) == SDIO_RESPONSE_2) || ((RESP) == SDIO_RESPONSE_3) \
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|| ((RESP) == SDIO_RESPONSE_4))
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/**
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* @}
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*/
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/** @addtogroup SDIO_Data_Length
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* @{
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*/
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#define IS_SDIO_DAT_LEN(LENGTH) ((LENGTH) <= 0x01FFFFFF)
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/**
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* @}
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*/
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/** @addtogroup SDIO_Data_Block_Size
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* @{
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*/
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#define SDIO_DATBLK_SIZE_1B ((uint32_t)0x00000000)
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#define SDIO_DATBLK_SIZE_2B ((uint32_t)0x00000010)
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#define SDIO_DATBLK_SIZE_4B ((uint32_t)0x00000020)
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#define SDIO_DATBLK_SIZE_8B ((uint32_t)0x00000030)
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#define SDIO_DATBLK_SIZE_16B ((uint32_t)0x00000040)
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#define SDIO_DATBLK_SIZE_32B ((uint32_t)0x00000050)
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#define SDIO_DATBLK_SIZE_64B ((uint32_t)0x00000060)
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#define SDIO_DATBLK_SIZE_128B ((uint32_t)0x00000070)
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#define SDIO_DATBLK_SIZE_256B ((uint32_t)0x00000080)
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#define SDIO_DATBLK_SIZE_512B ((uint32_t)0x00000090)
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#define SDIO_DATBLK_SIZE_1024B ((uint32_t)0x000000A0)
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#define SDIO_DATBLK_SIZE_2048B ((uint32_t)0x000000B0)
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#define SDIO_DATBLK_SIZE_4096B ((uint32_t)0x000000C0)
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#define SDIO_DATBLK_SIZE_8192B ((uint32_t)0x000000D0)
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#define SDIO_DATBLK_SIZE_16384B ((uint32_t)0x000000E0)
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#define IS_SDIO_BLK_SIZE(SIZE) \
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(((SIZE) == SDIO_DATBLK_SIZE_1B) || ((SIZE) == SDIO_DATBLK_SIZE_2B) || ((SIZE) == SDIO_DATBLK_SIZE_4B) \
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|| ((SIZE) == SDIO_DATBLK_SIZE_8B) || ((SIZE) == SDIO_DATBLK_SIZE_16B) || ((SIZE) == SDIO_DATBLK_SIZE_32B) \
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|| ((SIZE) == SDIO_DATBLK_SIZE_64B) || ((SIZE) == SDIO_DATBLK_SIZE_128B) || ((SIZE) == SDIO_DATBLK_SIZE_256B) \
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|| ((SIZE) == SDIO_DATBLK_SIZE_512B) || ((SIZE) == SDIO_DATBLK_SIZE_1024B) || ((SIZE) == SDIO_DATBLK_SIZE_2048B) \
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|| ((SIZE) == SDIO_DATBLK_SIZE_4096B) || ((SIZE) == SDIO_DATBLK_SIZE_8192B) \
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|| ((SIZE) == SDIO_DATBLK_SIZE_16384B))
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/**
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* @}
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*/
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/** @addtogroup SDIO_Transfer_Direction
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* @{
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*/
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#define SDIO_TRANSDIR_TOCARD ((uint32_t)0x00000000)
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#define SDIO_TRANSDIR_TOSDIO ((uint32_t)0x00000002)
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#define IS_SDIO_TRANSFER_DIRECTION(DIR) (((DIR) == SDIO_TRANSDIR_TOCARD) || ((DIR) == SDIO_TRANSDIR_TOSDIO))
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/**
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* @}
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*/
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/** @addtogroup SDIO_Transfer_Type
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* @{
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*/
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#define SDIO_TRANSMODE_BLOCK ((uint32_t)0x00000000)
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#define SDIO_TRANSMODE_STREAM ((uint32_t)0x00000004)
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#define IS_SDIO_TRANS_MODE(MODE) (((MODE) == SDIO_TRANSMODE_STREAM) || ((MODE) == SDIO_TRANSMODE_BLOCK))
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/**
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* @}
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*/
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/** @addtogroup SDIO_DPSM_State
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* @{
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*/
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#define SDIO_DPSM_DISABLE ((uint32_t)0x00000000)
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#define SDIO_DPSM_ENABLE ((uint32_t)0x00000001)
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#define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_ENABLE) || ((DPSM) == SDIO_DPSM_DISABLE))
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/**
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* @}
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*/
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/** @addtogroup SDIO_Flags
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* @{
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*/
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#define SDIO_FLAG_CCRCERR ((uint32_t)0x00000001)
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#define SDIO_FLAG_DCRCERR ((uint32_t)0x00000002)
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#define SDIO_FLAG_CMDTIMEOUT ((uint32_t)0x00000004)
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#define SDIO_FLAG_DATTIMEOUT ((uint32_t)0x00000008)
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||
|
#define SDIO_FLAG_TXURERR ((uint32_t)0x00000010)
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||
|
#define SDIO_FLAG_RXORERR ((uint32_t)0x00000020)
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||
|
#define SDIO_FLAG_CMDRESPRECV ((uint32_t)0x00000040)
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||
|
#define SDIO_FLAG_CMDSEND ((uint32_t)0x00000080)
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||
|
#define SDIO_FLAG_DATEND ((uint32_t)0x00000100)
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||
|
#define SDIO_FLAG_SBERR ((uint32_t)0x00000200)
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||
|
#define SDIO_FLAG_DATBLKEND ((uint32_t)0x00000400)
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||
|
#define SDIO_FLAG_CMDRUN ((uint32_t)0x00000800)
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||
|
#define SDIO_FLAG_TXRUN ((uint32_t)0x00001000)
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||
|
#define SDIO_FLAG_RXRUN ((uint32_t)0x00002000)
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||
|
#define SDIO_FLAG_TFIFOHE ((uint32_t)0x00004000)
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||
|
#define SDIO_FLAG_RFIFOHF ((uint32_t)0x00008000)
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||
|
#define SDIO_FLAG_TFIFOF ((uint32_t)0x00010000)
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||
|
#define SDIO_FLAG_RFIFOF ((uint32_t)0x00020000)
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||
|
#define SDIO_FLAG_TFIFOE ((uint32_t)0x00040000)
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||
|
#define SDIO_FLAG_RFIFOE ((uint32_t)0x00080000)
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||
|
#define SDIO_FLAG_TDATVALID ((uint32_t)0x00100000)
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||
|
#define SDIO_FLAG_RDATVALID ((uint32_t)0x00200000)
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||
|
#define SDIO_FLAG_SDIOINT ((uint32_t)0x00400000)
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||
|
#define SDIO_FLAG_CEATAF ((uint32_t)0x00800000)
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||
|
#define IS_SDIO_FLAG(FLAG) \
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||
|
(((FLAG) == SDIO_FLAG_CCRCERR) || ((FLAG) == SDIO_FLAG_DCRCERR) || ((FLAG) == SDIO_FLAG_CMDTIMEOUT) \
|
||
|
|| ((FLAG) == SDIO_FLAG_DATTIMEOUT) || ((FLAG) == SDIO_FLAG_TXURERR) || ((FLAG) == SDIO_FLAG_RXORERR) \
|
||
|
|| ((FLAG) == SDIO_FLAG_CMDRESPRECV) || ((FLAG) == SDIO_FLAG_CMDSEND) || ((FLAG) == SDIO_FLAG_DATEND) \
|
||
|
|| ((FLAG) == SDIO_FLAG_SBERR) || ((FLAG) == SDIO_FLAG_DATBLKEND) || ((FLAG) == SDIO_FLAG_CMDRUN) \
|
||
|
|| ((FLAG) == SDIO_FLAG_TXRUN) || ((FLAG) == SDIO_FLAG_RXRUN) || ((FLAG) == SDIO_FLAG_TFIFOHE) \
|
||
|
|| ((FLAG) == SDIO_FLAG_RFIFOHF) || ((FLAG) == SDIO_FLAG_TFIFOF) || ((FLAG) == SDIO_FLAG_RFIFOF) \
|
||
|
|| ((FLAG) == SDIO_FLAG_TFIFOE) || ((FLAG) == SDIO_FLAG_RFIFOE) || ((FLAG) == SDIO_FLAG_TDATVALID) \
|
||
|
|| ((FLAG) == SDIO_FLAG_RDATVALID) || ((FLAG) == SDIO_FLAG_SDIOINT) || ((FLAG) == SDIO_FLAG_CEATAF))
|
||
|
|
||
|
#define IS_SDIO_CLR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00))
|
||
|
|
||
|
#define IS_SDIO_GET_INT(IT) \
|
||
|
(((IT) == SDIO_INT_CCRCERR) || ((IT) == SDIO_INT_DCRCERR) || ((IT) == SDIO_INT_CMDTIMEOUT) \
|
||
|
|| ((IT) == SDIO_INT_DATTIMEOUT) || ((IT) == SDIO_INT_TXURERR) || ((IT) == SDIO_INT_RXORERR) \
|
||
|
|| ((IT) == SDIO_INT_CMDRESPRECV) || ((IT) == SDIO_INT_CMDSEND) || ((IT) == SDIO_INT_DATEND) \
|
||
|
|| ((IT) == SDIO_INT_SBERR) || ((IT) == SDIO_INT_DATBLKEND) || ((IT) == SDIO_INT_CMDRUN) \
|
||
|
|| ((IT) == SDIO_INT_TXRUN) || ((IT) == SDIO_INT_RXRUN) || ((IT) == SDIO_INT_TFIFOHE) \
|
||
|
|| ((IT) == SDIO_INT_RFIFOHF) || ((IT) == SDIO_INT_TFIFOF) || ((IT) == SDIO_INT_RFIFOF) \
|
||
|
|| ((IT) == SDIO_INT_TFIFOE) || ((IT) == SDIO_INT_RFIFOE) || ((IT) == SDIO_INT_TDATVALID) \
|
||
|
|| ((IT) == SDIO_INT_RDATVALID) || ((IT) == SDIO_INT_SDIOINT) || ((IT) == SDIO_INT_CEATAF))
|
||
|
|
||
|
#define IS_SDIO_CLR_INT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00))
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/** @addtogroup SDIO_Read_Wait_Mode
|
||
|
* @{
|
||
|
*/
|
||
|
|
||
|
#define SDIO_RDWAIT_MODE_CLK ((uint32_t)0x00000001)
|
||
|
#define SDIO_RDWAIT_MODE_DAT2 ((uint32_t)0x00000000)
|
||
|
#define IS_SDIO_RDWAIT_MODE(MODE) (((MODE) == SDIO_RDWAIT_MODE_CLK) || ((MODE) == SDIO_RDWAIT_MODE_DAT2))
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/** @addtogroup SDIO_Exported_Macros
|
||
|
* @{
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/** @addtogroup SDIO_Exported_Functions
|
||
|
* @{
|
||
|
*/
|
||
|
|
||
|
void SDIO_DeInit(void);
|
||
|
void SDIO_Init(SDIO_InitType* SDIO_InitStruct);
|
||
|
void SDIO_InitStruct(SDIO_InitType* SDIO_InitStruct);
|
||
|
void SDIO_EnableClock(FunctionalState Cmd);
|
||
|
void SDIO_SetPower(uint32_t SDIO_PowerState);
|
||
|
uint32_t SDIO_GetPower(void);
|
||
|
void SDIO_ConfigInt(uint32_t SDIO_IT, FunctionalState Cmd);
|
||
|
void SDIO_DMACmd(FunctionalState Cmd);
|
||
|
void SDIO_SendCmd(SDIO_CmdInitType* SDIO_CmdInitStruct);
|
||
|
void SDIO_InitCmdStruct(SDIO_CmdInitType* SDIO_CmdInitStruct);
|
||
|
uint8_t SDIO_GetCmdResp(void);
|
||
|
uint32_t SDIO_GetResp(uint32_t SDIO_RESP);
|
||
|
void SDIO_ConfigData(SDIO_DataInitType* SDIO_DataInitStruct);
|
||
|
void SDIO_InitDataStruct(SDIO_DataInitType* SDIO_DataInitStruct);
|
||
|
uint32_t SDIO_GetDataCountValue(void);
|
||
|
uint32_t SDIO_ReadData(void);
|
||
|
void SDIO_WriteData(uint32_t Data);
|
||
|
uint32_t SDIO_GetFifoCounter(void);
|
||
|
void SDIO_EnableReadWait(FunctionalState Cmd);
|
||
|
void SDIO_DisableReadWait(FunctionalState Cmd);
|
||
|
void SDIO_EnableSdioReadWaitMode(uint32_t SDIO_ReadWaitMode);
|
||
|
void SDIO_EnableSdioOperation(FunctionalState Cmd);
|
||
|
void SDIO_EnableSendSdioSuspend(FunctionalState Cmd);
|
||
|
void SDIO_EnableCommandCompletion(FunctionalState Cmd);
|
||
|
void SDIO_EnableCEATAInt(FunctionalState Cmd);
|
||
|
void SDIO_EnableSendCEATA(FunctionalState Cmd);
|
||
|
FlagStatus SDIO_GetFlag(uint32_t SDIO_FLAG);
|
||
|
void SDIO_ClrFlag(uint32_t SDIO_FLAG);
|
||
|
INTStatus SDIO_GetIntStatus(uint32_t SDIO_IT);
|
||
|
void SDIO_ClrIntPendingBit(uint32_t SDIO_IT);
|
||
|
|
||
|
#ifdef __cplusplus
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
#endif /* __N32G45X_SDIO_H__ */
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|